High-speed ADC improves resolution and bandwidth
Increased ADC (Analog-to-Digital Converter) device speed leads to increased power consumption, thereby increasing the overall system cost. Therefore, one of the primary needs of designers is to reduce the power consumption of high-speed ADCs.
ADI has recently launched 26 ADCs that can be used in high-performance, low-power communications, portable devices, instrumentation, and healthcare applications, expanding its low-power data converter product portfolio. The energy-saving features of new products can significantly improve power consumption without affecting system-level performance. These new space-saving, pin-compatible ADC product lines provide designers with a flexible platform for future products. Support system differentiation by increasing resolution or bandwidth without changing the core design.
Xue Rui, technical application engineer at ADI, said that reducing ADC power consumption can bring about a win-win situation. First, heat dissipation is reduced, reducing overall system power consumption and making power management easier. The direct effect is increased reliability, which can also reduce the operator's total cost of ownership. Secondly, the smaller size is more suitable for portable test equipment for field testing. Longer battery life and high-end imaging are also urgent needs in the industrial, military, aerospace and other fields. 
Figure 1, Xue Rui, Technical Application Engineer, Analog Devices
The AD9269 is a single-chip, dual-channel, 16-bit, 20/40/65/80 MSPS ADC. The power consumption of each channel is only 93 mW, which is 6.5 times lower than that of competitors. It has a built-in high-performance sample-and-hold circuit and on-chip. Voltage reference is the industry's first 16-bit ADC series with built-in quadrature error correction (QEC) and DC offset digital processing modules. These modules dynamically minimize errors in in-phase / quadrature (I / Q) complex signal receiver systems. By using the QEC module, system designers can reduce the gain and phase errors caused by component mismatch, easily meet the matching requirements, and then achieve a more robust receiver design. In addition, the DC bias algorithm minimizes the offset voltage that is common in DC-coupled applications. The product can provide 16-bit accuracy, 80MSPS data sampling rate, and ensure no missing codes over the entire operating temperature range.
The single-channel, low-power, 16-bit ADC AD9265 is used in communication applications that require low BOM cost, small size, and high flexibility. The power consumption is only 370 mW, which can save 51% compared to competitive products. The core of this ADC uses a multi-stage differential pipeline architecture and output error correction logic. It also integrates a high-bandwidth differential sample-and-hold analog input amplifier to support various user-selectable input ranges; a built-in voltage reference simplifies design; duty cycle The ratio stabilizer can be used to compensate the fluctuation of the ADC clock duty cycle, so that the converter can maintain excellent performance; the output data can be 1.8 V CMOS or 1.8 V LVDS (DDR). When needed, flexible power saving options can significantly reduce power consumption.
The AD9266 is a single-channel, 16-bit, low-power ADC. It is packaged in a small 5mm x 5mm package, and the pin output supports 10 to 16-bit resolution. The core of this low-power, multi-level ADC is based on a proprietary high-performance sample-and-hold circuit and on-chip voltage reference. It uses a differential pipeline architecture and output error correction logic to provide a data sampling rate of 80 MSPS and 16-bit accuracy. , To ensure no missing codes in the entire operating temperature range. This ADC has many features to achieve maximum flexibility and lowest system cost, such as programmable clock, data calibration, and programmable digital test pattern generation. Its digital test patterns include built-in deterministic and pseudo-random patterns, as well as user-defined test patterns input through SPI. The differential clock input controls all internal conversion cycles. The optional DCS can compensate for large fluctuations in the clock duty cycle while maintaining excellent overall ADC performance.
In this product series, the applied technology is in the leading position in the industry. Xue Rui said, for example, AD9269 is the industry's first 16-bit 80MSPS, low power, dual-channel ADC with QEC; AD9265 sampling rate range from 80 to 125MSPS; AD9266 is the industry's first single-channel 16-bit low-power ADC , Sampling rate from 20 to 80MSPS. "In addition to the AD9269, AD9265 and AD9266 flagship converter products and their various speed grade versions, ADI has also launched 23 single-channel low-power ADCs. Compared with similar competitive products with comparable performance, it can save up to 87% of the power Consumption ".
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